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DHUAN26's avatar
DHUAN26
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7 years ago

How to initialize the Configuration Space when PCIe core in Root port mode?

I can read Device id and Vendor id of Root Port, but can not read Device id and Vendor id of Endpoint by user logic. PCIe core connect with only one Endpoint,and only one lane.
DHUAN26's avatar
DHUAN26
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7 years ago

I can read out 0x00001172 of my Root Port Hard IP and ltssmstate == 5'h0F ( L0 state ).

TLP on alalon is CfgRd0（{fmt，tppe} = 8'h04）,64'h0000000F04000001 + 64'h0000000000000000

and read out value is 32'h0a101172.

However,

TLP on alalon is CfgRd1（{fmt，tppe} = 8'h05）,64'h0000000F05000001 + 64'h0000000000000000

I can not see TLP reply from End Point,which is a PMC chip.