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HTork's avatar
HTork
Icon for New Contributor rankNew Contributor
6 years ago

How to generate .sof file for IP evaluation in tethered mode

I'm using Intel Quartus Prime Lite 18.0.0 with the "Intel Cyclone 10 LP FPGA Triple-Speed Ethernet and Intel On-Board PHY Chip Reference Design" When compiling the design I get the following error...
HTork's avatar
HTork
Icon for New Contributor rankNew Contributor
6 years ago

Hi,

Yes, the Intel FPGA IP Evluation Mode is allready Enabled.

I tried to disable it an then enable it again pefore compiling, but I still get the same warning about the programming file.

Regards,

Hans

AnandRaj_S_Intel's avatar
AnandRaj_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

The problem is "Triple-Speed Ethernet" does not support the Intel FPGA IP Evaluation Mode feature.

We Can't generate programming files because we do not have a valid license for the following IP core or cores.

I have used example from below link & Quartus 18.0. which does not generates programming file with below warnings

Warning (12189): Intel FPGA IP Evaluation Mode (Simulation-Only) feature is turned on for all cores in the design

Warning (12191): Some cores in this design do not support the Intel FPGA IP Evaluation Mode feature

Warning (12192): "Triple-Speed Ethernet" does not support the Intel FPGA IP Evaluation Mode feature

Warning (115003): Can't generate programming files for your current project because you do not have a valid license for the following IP core or cores.

https://fpgacloud.intel.com/devstore/platform/18.0.0/Standard/intel-cyclone-10-lp-fpga-triple-speed-ethernet-and-intel-on-board-phy-chip-reference-design/

Kindly check the warning from Quartus message log.

Refer

https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/megacore-ip.html

Regards

Anand