New Contributor
Regular ContributorHi @HTork ,
To enable Intel FPGA IP Evaluation Mode.
During Intel® FPGA IP Evaluation Mode, the Compiler only generates a time-limited device programming file (<project name> _time_limited.sof) that expires at the time limit.
Refer
https://www.intel.com/content/www/us/en/programmable/documentation/akc1496248329442.html#wwy1496248963591
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.
Regards
Anand
New ContributorHi,
Yes, the Intel FPGA IP Evluation Mode is allready Enabled.
I tried to disable it an then enable it again pefore compiling, but I still get the same warning about the programming file.
Regards,
Hans
Regular ContributorHi,
The problem is "Triple-Speed Ethernet" does not support the Intel FPGA IP Evaluation Mode feature.
We Can't generate programming files because we do not have a valid license for the following IP core or cores.
I have used example from below link & Quartus 18.0. which does not generates programming file with below warnings
Warning (12189): Intel FPGA IP Evaluation Mode (Simulation-Only) feature is turned on for all cores in the design
Warning (12191): Some cores in this design do not support the Intel FPGA IP Evaluation Mode feature
Warning (12192): "Triple-Speed Ethernet" does not support the Intel FPGA IP Evaluation Mode feature
Warning (115003): Can't generate programming files for your current project because you do not have a valid license for the following IP core or cores.
https://fpgacloud.intel.com/devstore/platform/18.0.0/Standard/intel-cyclone-10-lp-fpga-triple-speed-ethernet-and-intel-on-board-phy-chip-reference-design/
Kindly check the warning from Quartus message log.
Refer
https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/megacore-ip.html
Regards
Anand
