How to generate MSIx interrupts in AvalonMM Startix10 PCIe HardIP+ when configured it as end point. And there are no signals like tl_cfg_ctl,tl_cfg_add,tl_cfg_func,MSIx_intfc_o which are available in other PCIe IPs of startix 10 why?

This problem is planned to fix in the next Quartus release version, where the tl_cfg interface will be exported by default from the IP at the top layer.

If further support is needed in this thread, please post a response within 15 days. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.

Regards -SK