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minjoolee's avatar
minjoolee
Icon for New Contributor rankNew Contributor
4 years ago

How to generate ALLPLL in S10 ?

Hi, I am tried to converter old pll in quartus 13.1 to quartus pro 21.x OLD ALLPLT has scanclk/scandataout port from tool . // synopsys translate_off `timescale 1 ps / 1 ps // sy...
Ash_R_Intel's avatar
Ash_R_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

In ALTPLL the scanclk, scandata etc are used for Dynamic Reconfiguration. In S10, PLL is different and the reconfiguration functionality can be achieved using IOPLL Reconfig Intel® FPGA IP Core: https://www.intel.com/content/www/us/en/docs/programmable/683195/20-3/core-references-14991.html


Also, the Dynamic phase shift ports are different: https://www.intel.com/content/www/us/en/docs/programmable/683195/20-3/dynamic-phase-shift-ports-in-the-ip-core.html


Regards