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corestar
Contributor
ContributorHow to divide a clock by two without using a PLL?
I'm using the Altera Tri-Mode EMAC for 10/100 Ethernet with MII interface to the Phy. This uses 25 MHz tx_clk and rx_clk generated by the Phy and going to the EMAC. These clocks do NOT use dedicated ...
SreekumarR_G_Intel
Frequent Contributor
Frequent ContributorHello David ,
Can I know how inlculding enable signal for ALTCLKCTRL work ? Is that anything i can help you further regarding to the issues ?
Thank you ,
Regards,
Sree
