Forum Discussion
vsath
New Contributor
New ContributorHow to debug the FFT IP using a custom made test-bench according to the user requirements using a vhdl test-bench in quartus 16.1.2 ??
The doubt is that when I open quartus prime standard 16.1.2 software with a 30 days evaluation license, couldn't able to find a proper way to write VHDL testbench and do simulate the FFT IP according...
vsathNew Contributor
New ContributorCan you suggest any video tutorial links in youtube or somewhere which helps me to see all this process. Because as I told I am new to this quartus. It will help me to navigate through tool features easily.
AnandRaj_S_Intel
Regular Contributor
Regular ContributorHi
Refer below links which may helps me to see all this process.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_gs_msa_qii.pdf
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/archives/ug_intro_to_megafunctions_140.pdf
INTEL FPGA TECHNICAL TRAINING look for simulation topics
https://www.intel.com/content/www/us/en/programmable/support/training/catalog.html?courseType=Online
Regards
ANAND
