How to convert combinational blocks to sequential blocks automatically?

Question

I have a relatively large combinational block that is mapped to an Intel FPGA using Quartus Prime Pro.

I recently learned that an ALM can provide the output either directly from an adaptive LUT or from a register that latches the value of the LUT.

I was wondering if it is possible to automatically convert the blocks from combinational to sequential, which results in a deeply pipelined design.

hbhat2 · Answer

Hi,In my view, one need to rewrite the RTL for sequential implementation. It is not possible to map combinational logic to sequential with the help of tool.The Quartus tool maps the logics based on RTL code either to LUT or registers.With Regards,HPB

sstrell · Answer

Without writing code to define the synchronous logic, there's no way the tool can automatically add registers into your design.#iwork4intel

khaichein_y_intel · Answer

Hi,Yes. You have to write the RTL to use synchronous logic.Thanks.

Forum Discussion

How to convert combinational blocks to sequential blocks automatically?

3 Replies

Recent Discussions

Can't generate F-Tile Ethernet Hard IP Design Example

MAX10 TSE reference design

Accessing registers in the PCIE IP beyond MCDMA using system console

Constraints not being picked for DCFIFO

Cyclone IV GX project failed migration from 20.1 to 23.1std