How do Matrix Transpose (corner turn) with SGDMA ?

Thanks Josyb for your response..

I am sorry, I am confused about word and data that you mean.

I try to describe with my way of thinking.

I need 32 bits per data coming from 14 bit ADC.

A stream contains 512 data.

There are 16 stream sequentially and store to memory using SGDMA stream to memory.

And resulting 512 stream out transposely (SGDMA memory to stream).

A stream-out contains 16 data.

And also resulting 32 bits per data.

I use 2 different clock system, 2MHz for stream input (incoming speed), 150MHz inside QSys (outgoing speed) controlled by Nios

I use Cyclone III EP3C120 board. At this moment there is no other component for accessing memory.

What approach do you suggest to solve this issue?

Thank you..