Forum Discussion

MEmel1's avatar
MEmel1
Icon for New Contributor rankNew Contributor
6 years ago

How can I initiate burst transfer for Avalon-MM in EMIF Cyclone 10?

Hello, My problem is that the component altera_emif_c10 (DDR3) doesn't complete reads with burstcount[..] set to more than 1. According to Avalon-MM interface protocol burst writes and reads are co...
NurAida_A_Intel's avatar
NurAida_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hi MEmel1,

You are more than welcome. 😊

There is a burstbegin signal in the Avalon-MM slave port. This is covered in the user guide I provided just now in Table 32 (page 48) under Chapter 3 in the user guide.

Thanks

Regards,

NAli1