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DdeBr
New Contributor
New ContributorHow can I configure the chip select high time (time between flash operations) when using the Generic Serial Flash Interface IP
We are clocking the Generic Serial Flash Interface IP at 156.25 MHz on a Cyclone-10GX, with a clock divider of 4. We can configure the chip select delay before the first clock, and after the last clo...
nleteNew Contributor
New ContributorHi,
I'am facing the same problem.
I use the Generic Serial Flash Interface IP to access an EPCQ256 flash. The internal clock provided to the IP is 100MHz.
The IP does not respect the timing characteristic of the EPCQ256 for the chip select high time (Tcsh = 50ns min in the datasheet). I checked with a scope, and the chip select high time is 20ns.
Fortunately, it works for the read and write operations, but it failed for the sector erase or chip erase operation.
The best way to solve this issue would be to add a parameter in order to configure this chip select high time.
