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HBhat2's avatar
HBhat2
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6 years ago

High-Speed Reed-Solomon IP Core

Hi, I need to know the descriptions of following signals i the RS FEC decoder module. I didn't get much info in the IP user guide (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/lite...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

As per my discussion with peers, the following are our understanding for your reference:

1) out_decfail - When this signal will be set. How to reset this failure?

[CP] This signal will be asserted when the errors within a packet exceed the decoder's correction capability. This signal should assert together with EOP and de-assert for a new packet.

2)out_errors_out- This include the corrected errors or even uncorrected errors if more bit errors in the received data

[CP] This shows the number of corrected errors. When the out_decfail is asserted, this output may be no longer valid.

3)out_errorvalues_out- What is the value of this set of signals?

[CP] This bus shows the raw symbol with error. The corrected symbol or decoded symbol will be at out_symbols_out.

It is recommended for you to perform a Modelsim simulation to further verify the IP behavior based on your target implementation.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin

  • HBhat2's avatar
    HBhat2
    Icon for Contributor rankContributor
    6 years ago

    Hi @cheepinc_Intel​ ,

    Thank you for detailed description. I was looking for the similar description in the user guide.

    Yes, I am running the simulation using Modelsim. I enabled the above set of options in the decoder. As I am initially working with Encoder to decoder loopback, I was inserting some errors and checking. But, unable to understand the meaning of above status bits. Now I will decode these status bits as per description provided by you.

    With regards,

    HPB

    • CheepinC_altera's avatar
      CheepinC_altera
      Icon for Regular Contributor rankRegular Contributor
      6 years ago
      Hi, Thanks for your update. Sorry for the confusion with the user guide. Please feel free to share with me your finding if you observe any anomaly with my description vs your simulation. Thank you. Best regards, Chee Pin
    • HBhat2's avatar
      HBhat2
      Icon for Contributor rankContributor
      6 years ago

      Hi @cheepinc_Intel​ ,

      There is one more option called "Hyper-Optimization". What role does this option play for the RS FEC Decoder IP? Even, there is no description for "Hyper-Optimization" field in the user guide. How the low, medium, high settings effect the functionality ?

      With Regards,

      HPB