Try make changes gradually, too many changes will not help you. So put back your design streaming as original then input from LUT instead of ADC.
your equation below is not right for its purpose:
ROM_data = sin(2*1000*pi*[0:255]/256)
plot(ROM_data) and see.
It should be like this:
ROM_data = sin(2*pi*[0:255]/256);
then scale up:
data = round(ROM_data * (2^15-1)); %for 16 bit signed
Use plot(data) to check result before you go to hardware.
The frequency you get from this sinusoid = Fs/256
so if your sampling clk = 50MHz then you should get a line at 50/256MHz
since each cycle takes that many clks to finish.If you want other higher frequencies then you can jump the LUT regularly.