Hello,
Using a PCIe, I am connecting a Cyclone V SoC kit with a Linux computer.
lspc is showing that the width capability is X4 and the negotiated width is X2.
Have you a solution to get the X4 width?
Best regards

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eberlazare_i_intel · Answer

Hi,
Here is the example design for Cyclone V on PCIe root port gen 1x4:
https://rocketboards.org/foswiki/Projects/A10AVCVPCIeRootPortWithMSILTS

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