HDMI IP Data and clock settings

HI,

HDMI IP has its own encoding and decoding logic and the HDMI example design page 23/24 is telling you the right clock frequency that you need to supply to the HDMI IP

• The most crucial clock will be the link_speed_clock (ls_clk) and video_data_clock (vid_clk)

Assume your 4k Pixel clock = HDMI TMDS clock = 594MHz

Then you can basically use the formula shown in page 23/24 to calculate required ls_clk and vid_clk

ls_clk = TMDS clock frequency/ Symbol per clock = 594/2 = 297MHz

Assume you are using 10 bit per colour with colour depth factor = 1.25

vid_clk = TMDS clock/ Symbol per clock/ Color depth factor = 594/2/1.25 = 237.6MHz

You can also checkout HDMI IP user guide doc if you would like to learn more about HDMI IP usage

• https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_hdmi.pdf

Thanks.

Regards,

dlim