GTS Transceiver PHY - Reference Clock Network

I am trying to understand the GTS Clocking Network.

In the user guide doc here, it is possible to see the following suggested design:

However later in the doc, we can see this statement:

Which is a confusing suggestion, as it suggests an the input clock to the SysPLL should control the i_rx_cdr and i_tx_pll.

Is there somewhere else that explicitly explains how to connect these three regional/local-ref clocks? Are they all connected to the same reference clock?

Many Thanks,

Kai