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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Generate HDL in QSYS with DSP builder block fails

Hi I am currently trying to generate HDL in the Qaurtus Prime QSYS version 15.1.0.189. I have succesfull imported the dspbuilder block by adding the path and connecting the DSP builder block i...
Ghe0rghe's avatar
Ghe0rghe
Icon for New Contributor rankNew Contributor
5 years ago

I too am having the same problem:

It seems like I can successfully import DSPBuilder-generated IP cores into Qsys using their hw.tcl file and .vhd files, but for some reason they do not compile in Qsys, where I receive the same error as you: "invalid command name "quartus_synth_callback""

Best,

-Gheorghe