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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

FFT Mega Core IP

I am working on FFT MegaCore IP. I would like to give 64 points to the generated file and get the output using Altera DE2 board not the simulation. I built a top level file.v to pass the inputs...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Check the attachment. i m using a ROM to provide inputs to controller. controller genrates proper SOP, EOP and Valid signals and passes them to FFT IP Core. the results of the IP Core are the also used as output of the controller. the symbol file attached will explain it all

Regards.
SYadl2's avatar
SYadl2
Icon for New Contributor rankNew Contributor
5 years ago

Hi,

we are facing issues with out put signals from FFT in board testing. But everything working fine in simulation.

is your issue is solved??