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alexislms's avatar
alexislms
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3 years ago

F-tile PMA: Timing Analyzer shows tx_clkout != rx_clkout using System PLL

The FGT is configured using System PLL to have the same clock at the TX and RX. The user guide says both clocks are same. When using system PLL clocking mode, both tx_clkout and rx_clkout...
Kshitij_Intel's avatar
Kshitij_Intel
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi,


As, We do not receive any response from you to the previous reply that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.


Thank you.