Forum Discussion
alexislms
Contributor
4 years agoF-tile PMA: Timing Analyzer shows tx_clkout != rx_clkout using System PLL
The FGT is configured using System PLL to have the same clock at the TX and RX.
The user guide says both clocks are same.
When using system PLL clocking mode, both tx_clkout and rx_clkout...
Kshitij_Intel
Frequent Contributor
4 years agoHi,
Can you please share your project to replicate the issue.
Thank you
Kshitij Goel