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MDehp's avatar
MDehp
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7 years ago

Errors when using the "MAX 10 Single-Port Triple Speed Ethernet and On- Board PHY Chip Design Example User Guide"

Hi all, When I use the MAX 10 Single-Port TSE reference design. I encounter some problems. I use version 18.0 of the reference design in Quartus 18.0. First of all when I open the design in platform...
MDehp's avatar
MDehp
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7 years ago

Hi Deshi,

When using the single ended IO standard there is only a mapping of the first 16 data pin pairs of the HSMC connector of the MAX 10 Development kit and the HSMC card.

And additionally 2 extra data pin pairs D0, D1, D2 and D3.

Now I'm missing 6 data pin pairs for the Avalon-ST.

But I can't find the pin Mapping for the other data pins described in the HSMC Specification. For example D8 (pin 53) or D10 pin 55.

Is there an additional Pin mapping of the MAX 10 HSMC pins available or are these data pins limited by the 18 data pin pairs that I am using now?

Kind regards,

Mansur