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MDehp's avatar
MDehp
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7 years ago

Errors when using the "MAX 10 Single-Port Triple Speed Ethernet and On- Board PHY Chip Design Example User Guide"

Hi all, When I use the MAX 10 Single-Port TSE reference design. I encounter some problems. I use version 18.0 of the reference design in Quartus 18.0. First of all when I open the design in platform...
MDehp's avatar
MDehp
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7 years ago

Hi dlim,

Thanks for your quick reply.

Now the statistic counters in the System Console give the right amount of received and transmitted Ethernet packets.

But the packets dont show up on the receiving Ethernet port in Wireshark. Do you know why and how I could receive them there?

I configure Both FPGA's with the same tcl script.

Kind regards,

Mansur