Forum Discussion
EMIF simulation protocol and result
- 4 years ago
Hello David,
I think that you have applied the Abstract PHY mode in the EMIF IP parameter editor.
This is an expected behavior during the simulation.
You can visit the link below that explain the Abstract PHY mode.
You can change the calibration mode to Full Calibration to analyze the full calibration flow.
But by enabling the Full Calibration mode, the simulation will run longer than the Abstract PHY mode.
I don't think that there is any documentation that describes the example design simulation.
You can take a look in the link below for the DDR calibration flow.
https://www.systemverilog.io/ddr4-initialization-and-calibration
I hope that can help you.
Regards,
Adzim
We do not receive any further response from you regarding to this thread. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.