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HBhat2's avatar
HBhat2
Icon for Contributor rankContributor
6 years ago

Electrical IDLE in Transceiver

Hi, My requirement is keep the transceiver lines in Electrical Idle whenever the Logical Layer FSM goes into low power state. I found that we can select "Enable tx_PMA_elecidle port" under TX PMA ...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi HPB,

As I understand it, when the TX buffer is put to electrical idle, the output voltage should be the common mode voltage. However, I have not physically measured this in hardware, you might need to perform hardware measurement to double check on this. Sorry for the inconvenience.

Best regards,

Chee Pin