New ContributorUnfortunately, Intel does not provide NVMe IP cores for FPGA.
I do found one of our Intel® FPGA Partners do provide it but I don't think it's free. You can contact them for further confirmation.
Please refer to the link below:
p.s. Don’t forget to Reply, and Select the Best Solution. :)
Super ContributorYes, you should be able to do it. You can customize the BSP, however, you need to verify the functionality from your side after making the changes to it.
You can refer to https://www.intel.com/content/www/us/en/programmable/documentation/per1479756414179.html?wapkw=open%20cl%20custom
Super ContributorUnfortunately, Intel does not provide NVMe IP cores for FPGA.
I do found one of our Intel® FPGA Partners do provide it but I don't think it's free. You can contact them for further confirmation.
Please refer to the link below:
p.s. Don’t forget to Reply, and Select the Best Solution. :)
New ContributorHi, thank you for replying! According to the website above, it seems like it is based on VHDL language and has been validated on Arria V GX, Arria 10 GX, Arria 10 SX. However, we are planning to use OpenCL and Intel acceleration cards, so do you know whether it is possible to use an IP core written in VHDL on Intel acceleration cards with OpenCL platform?
