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WFitt's avatar
WFitt
Icon for New Contributor rankNew Contributor
6 years ago

DisplayPort Source Link Training is failing sometimes. DisplayPort IP core seems to hang up.

On our Board we are using Cyclone V GX FPGA with Intel/Altera DisplayPort IP (Version 15.1, used as source, 2 lanes , 2.7 Gbps)​, connected to a NXP DisplayPort to LVDS Bridge PTN3460IBS. This conste...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

I have not hear back from you for 2 months. Hopefully my debug suggestion help out and you are able to make progress with your project.

For now, I am setting this case to closure.

Thanks.

Regards,

dlim