DisplayPort Rx IP can't generate stable recover clock in clock recover module.

Hi BCT_Intel

Thank you for your reply.

This picture is waveform around pll lock lost.

Also we already confirmed lock status on fractional PLL and this level is low when recover clock was low.

BTW, we already observed some signals which was measured by signal tap.

I'd like to share them to explain more detail. But I don't prefer here.

[Note]

Recover clock frequency is around 93.2[MHz].

Best regards,