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Jessica's avatar
Jessica
Icon for New Contributor rankNew Contributor
6 years ago

Differences in the use of Random Number Generator IP Core between Straitx IV and Arria 10

Simulate the Random Number Generator IP Core with ModelSim. The same testbench, when choosing different devices, the simulation results of rand_num_data are quite different. (1) When stratix iv (EP4...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

Thanks for your update. For your information, I have sent you a simple SIV simulation design through email which I am using to test the SIV random number generator simulation in Q17.0Std. You may do the following to run the with Modelsim Intel FPGA Edition 10.5b:

1. Unzip the file

2. Open Modelsim and change directory to siv_randnum\siv_rand\simulation\mentor

3. Type "source msim_setup.tcl"

4. Type "ld" to compile

5. Type "do wave.do" to populate the waveform

5. Type "run -all" to start simulation

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin

Jessica's avatar
Jessica
Icon for New Contributor rankNew Contributor
6 years ago

Hi,

​

Sorry, I have not responded recently. About your "siv_randnum.zip" file, there are many errors when I type "ld" to compile. See the attached txt file for details.