New Contributor
Regular ContributorHi,
As I understand it, you observe some issue with the SIV random number generator IP in Modelsim simulation where at 320MHz, there seems to be Z at the output. To facilitate further debugging, would you mind to share with me a simple test design and test bench which could replicate the observation? Please share with me the specific Quartus version that you are using as well.
Please let me know if there is any concern. Thank you.
Best regards,
Chee Pin
New ContributorHi,
Quartus Prime Standard 17.0 is used. There are two main problems in modelsim simulation of random number generator, when using EP4SGX230KF40I3.
(1) The output (rand_num_data) is not synchronized with inclk.
(2) When the clock frequency is increased to 320MHz, the output (rand_num_data) will have an indeterminate state Z.
But, when using qsim, there are no problems appear.
The attachment is the project files.
Thank you.
