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anm's avatar
anm
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

DE0-CV - SDRAM Controller IP Core

Hi, I have a DE0-CV Board with a Cyclone V on it (CycloneV 5CEBA4F23C7N ). The Board has 64MB of SDRAM. I want to add in my design an SDRAM Controller IP, in order to be able and have access over ...
NurAida_A_Intel's avatar
NurAida_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Dear Nassos,

Regarding the SDRAM controller IP, yes you may follow the user guide in provided link above. Also, here is another user guide which included DDR3 SDRAM controller (with UNIPHY) as well --> https://www.intel.com/content/dam/altera-www/global/ja_JP/pdfs/literature/hb/external-memory/emi_ddr3up_ug.pdf

Feel free to check out this EMIF homepage which centralizes all the information you need to create a memory interface: https://www.intel.com/content/www/us/en/programmable/support/literature/lit-external-memory-interface.html

I can see that you wanted a controller that have Wishbone interface. To be frank, I am not really familiar with this Wishbone interface. Anyway, I did some internal searching and found this page and hope this is helpful --> https://www.intel.com/content/www/us/en/programmable/solutions/partners/partner-profile/eureka-technology-inc-/ip/ahb-to-sdram-controller.html?wapkw=sdram

Let me know if you have any concern.

Thanks

Regards,

Aida