Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

DCFIFO Megafunction simulation problem

Hi, I am attempting to use DCFIFO megafunction in my design, but i can't get it running!! The input data to be written to FIFO is (45 bit parallel) streaming video data clocked at 5MHz (...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

The big difference between the two clocks shouldn't be a problem.

Are you sure those signals are in high impedance state? I don't see how the model could produce this. If there were an initialization problem they would rather be in the U or X state, but not Z.

Are you sure the FIFO is connected correctly in your testbench?