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ymiler's avatar
ymiler
Icon for Contributor rankContributor
3 years ago

clock control intel FPGA IP

Hi My version of Quartus Prime is 22.3 I try to generate clock control IP for the device startix 10 When I define 2 input clocks the option to ensure glitch free changed to gray and I get...
AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


Thank you for reaching out Intel FPGA Community.


If you refer to the Clock Control Block (ALTCLKCTRL) IP Core User Guide, it has mention that when you are using the glitch free switchover feature, the clock you are switching from must be active. If it is not active, the switchover circuit will not be able to transition from the clock you originally selected. Refer link below for the user guide:

https://www.intel.com/content/www/us/en/content-details/654442/clock-control-block-altclkctrl-ip-core-user-guide.html?wapkw=clock%20control%20intel%20fpga%20ip&DocID=654442


Regards,

Aqid