Forum Discussion

LHøi0's avatar
LHøi0
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6 years ago

Can the altera_pll version 18.0 be used on Cyclone V without the RREF_TL pin connected?

We are using a 5CEBA2F17C8N, 60 MHz input clock, PLL output clock also 60 MHz, feedback mode is "normal". After an IP upgrade the PLL stopped running. The upgraded PLL IP version was 18.1. Copying al...
S_Healthineers's avatar
S_Healthineers
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5 years ago

I have the same problem and am working with version 18.1. Now I'm waiting for the new boards where the forgotten pin RREF has been adjusted.

If I understand that correctly, if I use version 18.0, the problem is not there and then I have no problems with the PLL that do not lock.