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Yod1's avatar
Yod1
Icon for New Contributor rankNew Contributor
5 years ago

Can not generate example design of HDMI Intel FPGA IP

Hi all,


When I used the Quartus version 20.1 standard to generate the example design, I got the error message like this:

Error: no files matched glob pattern "*"
while executing
"__altera__safe_glob -directory C:/Users/myaccount/AppData/Local/Temp/alt8800_4565935366385225410.dir/0005_hdmi_0_gen/sv_hdmi2/software/hdmi_demo_bsp..."
("uplevel" body line 1)
invoked from within
"uplevel 1 [list __altera__safe_glob {*}$args]"
(procedure "glob" line 2)
invoked from within
"glob -directory $src_dir *"
(procedure "glob_recursive" line 2)
invoked from within
"glob_recursive $item [file join $dest_dir $filename] $top_name"
(procedure "glob_recursive" line 8)
invoked from within
"glob_recursive $item [file join $dest_dir $filename] $top_name"
(procedure "glob_recursive" line 8)
invoked from within
"glob_recursive [pwd] {} $ed_name"
(procedure "generate_copy_ed" line 40)
invoked from within
"generate_copy_ed $design_name($family)"
(procedure "generate_example" line 11)
invoked from within
"generate_example hdmi_0_example_design"

I have tried the following, but I still get the error.
https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/How-can-I-use-the-HDMI-Tx-port-on-Arria-V-GX-Starter-kit/m-p/669841#M13209

How can I solve this problem?

1 Reply

  • Deshi_Intel's avatar
    Deshi_Intel
    Icon for Regular Contributor rankRegular Contributor
    5 years ago

    Hi,


    Kindly provide more info below so that we can help you out further ?

    • Which FPGA device family that you are using here ?
    • Are you trying to generate HDMI hardware example design or simulation example design ?
    • What setting that you configure in HDMI IP ? Pls share screen shot
    • Are you using Wins or Linux OS ?


    Thanks.


    Regards,

    dlim