Forum Discussion

Contributor

5 years ago

Solved

C10 GX FPll Reconfig

Hello, I am looking for dynamic reconfiguration of C10 GX fPLL. But from the parameter editor, I was referenced to xcvr user guide. The guide only explain the structure of the pll. But how coul...

Rahul_S_Intel1
5 years ago
Hi ,
For confidentiality purpose the communication is taken to private conversation

Rahul_S_Intel1

Frequent Contributor

5 years ago

Hi ,

Kindly requesting to refer the below document page no: 87 for the reconfiguration

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-10/c10gx-51003.pdf

JLee25
Contributor
5 years ago
Hi Rahul,
Thank you!
I searched the document and not able to find the register address of M/N counter..
https://www.intel.com/content/www/us/en/programmable/documentation/hki1486507600636.html
or what's the definition of register address 0x12B, 12C, 133, 134, 13 and 136....
I checked the xcvr_phy, neither..
BRs,
Johnson

Forum Discussion

C10 GX FPll Reconfig

Recent Discussions

Cyclone-V SCFIFO with M10K/MLAB memory - adding ECC

Constraints not being picked for DCFIFO

Cyclone 10 GX IBIS-AMI models

MAX10 TSE reference design

Agilex3/5 GTS Hard Ethernet IP 10G example design pin loc and io std wanted