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MUrba10's avatar
MUrba10
Icon for New Contributor rankNew Contributor
5 years ago

Bit slip port in E-TILE transceivers. Native PHY mode

Hello, I have a question regarding bit slip functionality in Stratix 10 E-TILE transceivers, functioning in Native PHY mode. Other Intel FPGA transceivers have a dedicated bit slip port (for example...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,

As I understand it, you have some inquiries related to the support of bit slip function in the S10 E-Tile XCVR. For your information, there is no support of the bit slip function in the E-Tile XCVR. The RX phase slip feature is for dynamic reconfiguration purpose. You might need to code your bit slip function in core logic if you would require to use it. Sorry for the inconvenience.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin