Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

BFM Read from On Chip RAM

I followed D. W. Hawkins (dwh@ovro.caltech.edu) tutorial on JTAG-to-Avalon-MM. There is a task in the tutorial that reads a slave address using the BFM master. The slave is onchip_ram. The problem is...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

--- Quote Start ---

I just ran the simulation on ModelSim and traced the waitrequest=0 and readdatavalid=1 signals generated by the Avalon translator connected to this on-chip RAM. The readdatavalid is produced properly the next clock cycle when data is ready to read but the BFM master still reads the previous clock cycle

--- Quote End ---

Try tracing at the BFM interface, i.e., your Qsys design will have BFM<->fabric<->Slave. Since the fabric to slave interface does not have a waitrequest and readdatavalid, try probing at the BFM side.

This might be what you just did, but it was not clear in your description ...

Cheers,

Dave