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ecohn's avatar
ecohn
Icon for New Contributor rankNew Contributor
4 years ago

Bar range field not working correctly in Avalon-ST Intel Stratix 10 Hard IP for PCI Express

hi, i am using in my design (for Intel stratix 10 FPGA) a IP from Quartus 19.4 (but i see same behaviour also in 21.1 version) - Avalon-ST Intel Stratix 10 Hard IP for PCI Express . we see the...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


Could you share the .ip file and what is the expected value?


Thanks

Best regadrs,

KhaiY