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Hi,
There are 4 Intel FPGA SoC board variants that provides similiar AXI Interconnect;
First 3 Intel FPGA SoC boards are the Cyclone V, Arria V, and Arria 10 device; On these devices the bridges are AMBA AXI-3 compliant and support simultaneous read and write transactions. Up to three masters in the FPGA fabric can share the HPS(hard processor system) SDRAM controller with the processor.
The 4th is the Stratix 10 devices; On this device the FPGA-to-HPS bridge implements the AXI Coherency Extension (ACE) protocol, and passes through the CCU(cache coherency unit) block.
More info about the difference between these Intel FPGA SoC boards;
https://www.intel.com/content/www/us/en/programmable/documentation/cru1463082726154.html
Hope this information helps you, feel free to ask more questions.