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SDost
New Contributor
6 years agoAvalon to external bus bridge - Accessing 8Bit with 32Bit commands
Hi everyone, I have following problem using the <Avalon-to-external-Bus-Bridge>: I need to build a "PCIe to external Bus-Bridge" using a Cyclone-IV-GX. So I created a System using the Altera PCIe-H...
KennyT_altera
Super Contributor
6 years agoYou may check https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_avalon_spec.pdf page 36 for address alignment.
Basically,
a 32-bit master read from a 16-bit slave results in two read transfers on the slave side. The reads are to consecutive addresses.
To write to specific bytes within a data word, the master must use the byteenable signal. Page 14