Forum Discussion
Occasional ContributorAvalon MM Slave - What's the simple way to extract the above lines from QSYS to HDL?
Hi,
The proper way in my opinion would be to instantiate a "Avalon-MM Pipeline Bridge" IP in your Qsys.
You connect its slave interface to the Nios master and export IP's master side.
When you instantiate the qsys in your hdl, the Avalon signals will be there for you to connect to your component.
As for your other question, what are you trying to do? I would say you can simply export anything from your Qsys to wherever it is instantiated.
Occasional ContributorI am not sure I understand what you mean. Do you have a link to where you read about this component?
Otherwise, what I suggested applies if you want to connect your slave component outside of Qsys (eg: the qsys and the component are both instantiated in a top module).
But if you want to, you can directly put your VHDL component inside the Nios' Qsys and connect the Avalon interfaces like any other IP. To do this, you have to generate a _hw.tcl file for your module. Then it appears in Qsys' IP catalog.
I would say it is easier to connect everything inside Qsys, because it can automatically add protocol converters if needed.
Occasional ContributorThank you, you helped me a lot!
