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AGaru1's avatar
AGaru1
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Avalon -MM Intel Stratix 10 Hard IP+ for PCI Express

Hi, i'm trying to use the Avalon -MM Intel Stratix 10 Hard IP+ for PCI Express for my FPGA application but the use guide doesn't provide me enough informations for my level of knowledge. Is there an...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

The bursting slave interface allows the user application in the FGPA to access the PCIe system memory. Do you use FPGA (endpoint) to issue a memory read/write request to the host? If yes, then you need this interface.

As for the example design generation, I use v19,3 to generate the example design, and it works well. Could you please try to use v19.3 if you are not doing so?

Regards -SK