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HKana17's avatar
HKana17
Icon for Occasional Contributor rankOccasional Contributor
5 years ago
Solved

Available configuration with SDRAM Controller (altera_avalon_new_sdram_controller)

Hi, I am looking for a way to configure the SDRAM Controller in Platform Designer system (altera_avalon_new_sdram_controller). I want to use the configuration of the attached figure. This is of R...
  • sstrell's avatar
    sstrell
    5 years ago

    Just because the CS lines are not separated in this diagram doesn't mean you couldn't specify two separate CS lines, assuming your board hasn't been designed yet. If your board is already designed and it matches the diagram, I don't think there's much you can do because, as you say, the IP only supports a single RAS/CAS.

HKana17's avatar
HKana17
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Excuse me. I forgot to add some information.

SDRAM means SDR SDRAM.
My Quartus version is 18.1 lite.