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Altera_Forum
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11 years ago

ASI Megafunction and the Data Valid

hi i testing the ASI-Megfanction in quartus 13. I see that the data valid is not constant high for the 188 byte frame. It is per byte high. http://www.alteraforum.com/forum/attachment.ph...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

The question is what is the clock speed? 270MBits/s is only a 33.75MHz dword rate. Assuming your image has valid high for 1 clock and low for three, it seems that the system clock is 135MHz.

ASI runs at a constant data rate, so needs the data valid to run at this data rate when the clock is faster.

From your diagram, if the dvalid was high for the entire frame, you would collect multiple sync bytes (0x47), and it would cause all sorts of problems.