Forum Discussion

SKuma36's avatar
SKuma36
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Arria10 PCIe Hard IP link bring up issue

Hi, We are trying to bring-up PCIe (Gen1 x1) interface using Arria 10 PCIe Hard IP on Intel's Arria10 Signal Integrity development board. The design is found to be working in simulation, but on the...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

​Hi Sunil,

I don't aware if there is any for A10. The things that you can do is to capture the signal tap for the LTSSM and see the status, or you can create a simple design by using Native PHY, and then use the Transceiver Tool Kit to analyze the link.

Regards -SK