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SKuma36's avatar
SKuma36
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Arria10 PCIe Hard IP link bring up issue

Hi, We are trying to bring-up PCIe (Gen1 x1) interface using Arria 10 PCIe Hard IP on Intel's Arria10 Signal Integrity development board. The design is found to be working in simulation, but on the...
SKuma36's avatar
SKuma36
Icon for Occasional Contributor rankOccasional Contributor
7 years ago
Hi SK, Ok got it. Is there any way we can debug this link bring up issue? I could see some PCIe Link Inspector tool for Stratix 10 FPGA. Do we have any such thing for Arria 10 FPGA? Rgds, sunil