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SKuma36's avatar
SKuma36
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Arria10 PCIe Hard IP link bring up issue

Hi, We are trying to bring-up PCIe (Gen1 x1) interface using Arria 10 PCIe Hard IP on Intel's Arria10 Signal Integrity development board. The design is found to be working in simulation, but on the...
SKuma36's avatar
SKuma36
Icon for Occasional Contributor rankOccasional Contributor
7 years ago
Hi SK, Thanks for the info. Is it possible to change the location of channel 0 of PCIe to some other channel other than channel 4 (Block E) ? I tried using channel 0 (Block F), but Fitter operation resulted in error. Pl. check the attached snapshots. Rgds, sunil