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Occasional Contributor

7 years ago

Arria10 PCIe Hard IP link bring up issue

Hi, We are trying to bring-up PCIe (Gen1 x1) interface using Arria 10 PCIe Hard IP on Intel's Arria10 Signal Integrity development board. The design is found to be working in simulation, but on the...

SengKok_L_Intel

Regular Contributor

7 years ago

Hi Sir,

For PCIe hard IP testing, this is suggested to use the A10 FPGA development kit, where there is a PCIe interface for you to connect to the Root Port.

Here is the link:

https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-a10-gx-fpga.html

Regards -SK

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Arria10 PCIe Hard IP link bring up issue

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