Forum Discussion
NZhan1
Occasional Contributor
Occasional ContributorArria10 DMA失败
使用10AX027和CPU调试PCIe时发现以下问题： 调试过程中软件驱动负责分配一块物理内存，然后把物理内存地址写入FPGA，FPGA从这个物理内存地址做DMA，读取内容。 在Xeon系列的硬件平台上的异常现象是： 当驱动分配的物理内存在4G以上时，FPGA做DMA是可以的，分配到4G以下时，FPGA发送tlp的读请求后，始终得不到响应，DMA失败。 做了以下尝试： 将FPGA及...
SengKok_L_Intel
Regular Contributor
Regular ContributorFor AER definition, you can refer to section 9.5:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_avst.pdf
If you are using Linux, the command below might be helpful to read the AER:
setpci -s B:D.F ECAP_AER+0x10.l
setpci -s B:D.F ECAP_AER+0x04.l
Regards -SK
NZhan1Hi SK, So your suggestion is to check the two registers, and compare with “9.5. Uncorrectable and Correctable Error Status Bits” to locate the problem. The detailed status info will be found at PCI Express Base Specification. The “setpci -s B:D.F ECAP_AER+0x10.l” is used to check ”Correctable Error Status Register”. And the “setpci -s B:D.F ECAP_AER+0x04.l” is used to check” Uncorrectable Error Status Register”. Thanks! Regards， Nicole
