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KCMurphy's avatar
KCMurphy
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
Solved

Apparent bug in LPDDR3 simulation (altera_emif:19.2.0) Arria 10

During a long burst read from a (simulated) Micron LPDDR3 memory, the simulation of the Intel Arria 10 hard controller (quarter-rate) eventually drops a 32-bit word (it delivers xxx's for that portio...
  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    3 years ago

    Hi KCMurphy,


    The emif_usr_clk is around 199MHz and that is in the acceptable range.

    The ref_clk is still at the 200MHz.


AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi KCMurphy,


Thank you for using Intel Community.


I want to clarify a few questions regarding this issue.

Do you able to take a snapshot when the problem is occurred or from your observation?

Are you using Intel BFM or other vendor BFM?

Is there any timing violation in the design?

If you're using the EMIF example design, may I have the design? Sharing the qar file should be fine.


Regards,

Adzim